Memory control circuit


PURPOSE:To use a part of an instruction ROM as a data ROM by providing an address converting and area detecting circuit and extending an instruction execution cycle in accordance with an area detection signal generated in an address converting means. CONSTITUTION:A data ROM18 has an address area of 1K words. If a data ROM address mechanism 16 outputs an address signal exceeding 1K words, an address converting and area detecting circuit 17 executes the control to access an instruction ROM14 instead of the ROM18. That is, an address conversion signal 23 becomes an address signal obtained by substracting 1K words from the output of the address mechanism 16 and is applied to the ROM14 through a multiplexer 13 by an area detection signal 24. The output from the ROM14 is inputted to an operating part 22 through a multiplexer 19, and the signal 24 impressed to an execution control part 15 controls the execution cycle. Thus, the execution cycle is extended, and a part of the instruction ROM can be uses as a data ROM.




Download Full PDF Version (Non-Commercial Use)

Patent Citations (0)

    Publication numberPublication dateAssigneeTitle

NO-Patent Citations (0)


Cited By (4)

    Publication numberPublication dateAssigneeTitle
    JP-H01269128-AOctober 26, 1989Matsushita Electric Ind Co LtdMicrocomputer
    JP-H02183331-AJuly 17, 1990Matsushita Electric Ind Co LtdMicrocomputer
    JP-H0659971-AMarch 04, 1994Matsushita Electric Ind Co Ltd, 松下電器産業株式会社メモリ読み出し装置
    JP-S62297953-ADecember 25, 1987Omron Tateisi Electronics CoDisplay device